Introduced by Intel, PCI Express (Peripheral Component Interconnect Express), officially abbreviated as PCIe or PCI-e, is a high-speed serial computer expansion bus standard for computing and server applications. It became the first of its kind in the early 2000s and has now become the standard in over 900 member corporations throughout the world. The heavy technical needs for a high-speed interconnect bus in servers and computing platforms are fairly obvious. Contemporary systems have gigabytes of high-speed data continuously transporting from processors to graphics cards and memory inside the platform. This also relates to consumer devices like gaming consoles and remote memory drives. But it’s only in recent years that similar data demands have led to a need for PCIe in portable devices.
PCI 3.0 Express
The PCI 3.0 Express connection was brought to consumers in 2010, with a hypothetical transfer rate per lane of almost 1 GB/s twice the frequency of the PCI Express 2.0 standard that offers 500 GB/s per lane. In comparison, a PCI Express 2.0 x16 slot offers a maximum notional bandwidth of 8 GB/s, while a PCI Express 3.0 x16 slot reaches 16 GB/s. So why is PCIe 3.0 important you ask? Simply put, speed in computing is everything. GPUs have a great deal of internal memory bandwidth (264GB/sec; more with cache) but shuffling data between the GPU and the CPU can lead to bottlenecking processes that tops out at 8GB/sec under PCIe 2.1. Since GPUs are still specialized devices that excel at parallel code execution, a lot of workloads exist that will need to constantly move data between the GPU and the CPU to maximize parallel and serial code execution. This is where PCIe 3 comes in and bridges the gap between these core systems.
4th Generation and the future of PCIe
PCIe 4.0 is the upcoming, highly anticipated iteration of PCI Express. The interconnect performance bandwidth is twice that of the PCIe 3.0 specifications and is capable of achieving 16GT/s without sacrificing compatibility with legacy software and previous mechanical interfaces as PCIe 4.0 architecture is completely compatible with prior generation of PCIe technology. The 4th generation of PCIe is expected to provide developers with access to more lane width arrangements and speeds apt for low-power applications. Other expected developments consist of decreased to system latency, upgraded scalability for additional lanes, and lane margining.
With a new version of PCIe around the corner, here are the specs throughout the years compared to PCIe 4.0:
|PCIe Generation||Total BW for x16 link||BW Lane Direction||Bit Rate (Raw)||Interconnect BW|
|PCIe 1.0||~8 GB/s||~250 MB/s||2.5 GT/s||2GB/s|
|PCIe 2.0||~16 GB/s||~500 MB/s||5.0 GT/s||4 GB/s|
|PCIe 3.0||~32 GB/s||~ 1 GB/s||8.0 GT/s||8 GB/s|
|PCIe 4.0||~64 GB/s||~ 2 GB/s||16.0 GT/s||16 GB/s|
According to Tech Report, PCIe 4.0 is due to be released later on this year.